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Please Read The following downloads and designs are the copy right of Cumbria Designs and are provided free for non commercial use. In return for using any of the material provided below, we ask that you make a donation to a deserving charity. How much and to which charity is up to you of course. We hope that you find these downloads a useful addition to your projects. Contents A PIC Fast Huff Puff Stabiliser RAMU Remote Antenna Matching Unit |
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| A PIC Fast Huff Puff Stabiliser | |||||||
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Description The software and circuit described in this article implements a "Fast Huff Puff" VFO stabiliser in a PIC processor. The design is much simpler in terms of circuit complexity when compared to the discrete Fast Huff Puff approach because many of the circuit functions are performed by software and hardware internal to the PIC device. The result is a very simple circuit with surprisingly good performance. Two variants are offered here, one for the more common PIC16F628A giving 20Hz lock points with a 10kHz sampling rate and an improved version for the PIC16F88 giving 10Hz lock points at a 10kHz sampling rate. Both designs use the same circuit, only the software differs. Circuit A
simplified block diagram, of the PIC stabiliser is given below. The
input signal is squared and passed to an asynchronous counter TMR1L, where
it is sampled at 10kHz. The use of TMR1 provides a convenient method of
sampling the input signal but introduces a divide by two action,
effectively halving the potential lock point spacing. The sampling rate is
much lower than the VFO frequency and the duration the sampling will span
many cycles of VFO, importantly though the process is consistent in time
and produces a 1 or a 0 depending upon the phase of the VFO at the instant
the sampling gate shuts. The sampled signal is then branched into two
paths, one goes direct to the phase detector, (a software XOR function),
the other enters a delay line formed by a shift register, again clocked by
the sampling clock. The shift register delay is the number of stages
multiplied by the sampling clock period; T=Nts. T The XOR detector is a very simple but extremely effective phase detector. It action always produces a correction output irrespective if one is needed. Sometimes it is right, other times it is wrong, but when it is wrong the phase relationship at its inputs cause it to correct itself on the next “decision”. As Peter Lawton, G7IXH inventor of the Fast Huff Puff system described; "..over many samples the XOR will statistically always produce an output that will drive the VFO towards the nearest lock point." The resultant stability of the stabiliser is set by the processor clock, in this design a 20MHz crystal. The
lock point spacing is given by; Lock Point spacing (Hz) = 2fs/N The 16F628 software uses 1000 step shift register defined in General Purpose Register memory (GPR) to produce 20Hz lock points with a 10kHz sampling rate. The 16F88 has a much larger GPR memory area and so can accommodate a larger shift register. In the design offered here a 2000 step shift register is used to give 10Hz lock point spacing at 10kHz sampling rate. The sampling rate is set by the program execution time. With a 20MHz clock and 2000 step shift register 10kHz is approaching the upper limit. Faster PICs or over clocking will produce higher sampling rates and a closer lock point spacing. Decade values for sampling rate and lock points have been chosen only for convenience of testing. By streamlining the program and using non decade values, a slight increase in sampling rates and reduction of lock point spacing will be possible. Whilst the designs have only been tested to 13MHz, current PIC performance should allow operation at input frequencies up to 50MHz. Higher input frequencies at VHF and UHF could also be accommodated by ether mixing down or dividing the oscillator source before applying it to the PIC input. If division is used this will increase the lock point spacing as a factor of the divisor value. |
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The circuit for the Fast Huff Puff stabiliser is given on the right. In some applications the addition of an operational amplifier integrator may be desirable to provide adjustment of the varactor tuning range. There is plenty of scope for future development with newer PIC families offering the potential for larger shift registers and lower lock point spacing at higher sampling rates. Peter Lawton has produced a simulator for computer modeling of Huff Puff systems which provides graphical information of performance. This is a very useful tool for aiding the development of Huff Puff schemes and is available for download at http://www.plvideo.com/personalpage1.html |
Circuit Diagram (click to enlarge) |
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Software Two sets of files are provided for each PIC device. One in Assembler language format and a compiled hex file for loading into the PIC using any convenient programmer. the Assembler language programs can be read using a text editor such as notepad. To compile or modify these programs you will need to use Microchip's MPLAB which is available as a free download on the Microchip website; www.microchip.com Future Developments There are two clear program improvements that can easily be made. The first is to use an interrupt driven sampling routine to replace the carefully time cyclic program execution time. The second is to add a lock detector using perhaps the TMR1 count to detect when subsequent counts differ by 1 count or less. This could then drive a Lock LED on one of the spare port pins.
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Software
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New Versions! It didn't take long! shortly after the RadCom TT article was published two new variants appeared. the first was from Francis Dupont F6HSI followed by a 16F84 version from Chas Fletcher noted for his "Stay Put" Huff Puff design in 2000/2001. |
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Francis Dupont F6HSI, has been experimenting with the original assembler based software and has produced a new "asm" version for the 16F88 that makes extensive use of the MPASM Macro language. This new version is easier to configure and serves as an excellent tutorial in MPASM Macro programming. To be able to compile this version you will need to include the "inc" files in the "MPASM Suite" directory. Great piece of work and huge programming improvement over my "long hand" code. Francis has also re-worked the original hardware design to produce a very professional PCB version with a TXCO reference. Well done Francis!
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F6HSI Version |
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Chas Fletcher adapted my 16F628 code for the 16F84 and in doing so uncovered a subtle difference in the internal operation of the two processors; "Having viewed your code and the F6HSI exercise in using MPLab assembler, I decided to have a go with the only PIC I had handy, a 16F84. This restricted the size of the SR as it has limited ram and as I have always been keen on interrupts, I put the sampling and shifting code in an ISR. Worked straight away on the F84, lockup from start-up no problem. I then decided to come into the more recent world and laid hands on the F627/8. Two weeks later I found the reason that it wouldn't work; it turns out that the implementation of the XOR instruction is different between F84 and F628, and my use of the Carry bit after the XOR was not admissible, even though the code tested OK using MPSim. Had I copied your routine I would not have had a problem as you don't bother with the carry bit.!!! But, that is the trouble with going your own way !!!!!" The asm file for Chas's code is provided to the right. Like Francis, Chas declares areas of memory for the shift register avoiding a huge "copy and paste" exercise.
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G3DXZ Version
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Acknowledgement My thanks to Peter Lawton who put forward the original idea of using a PIC as the basis for a Fast Huff Puff Stabiliser and who also conducted all of the independent testing of the designs on his trusty KW2000A. How's that for an interesting combination of technologies? As Peter put it, "I now must have the most stable KW2000A in the word." OK, I know. Having made that bold statement, someone will now just have to turn up with a Rubidium or Caesium referenced version...
Ron Taylor G4GXO Cumbria Designs
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"It's a KW2000A Jim, but not as we know it..." |
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| C-1 Controller Source Code | |||||||
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The C-1 Controller was designed as the Tx/Rx sequencer for the T-1 SSB/CW Sub System. In addition to providing full break in Tx/Rx functionality, the C-1 also provides hang AGC, variable break-in delay and a convenient control interface for all of the T-1 functions. We've decided to put the source code into the public domain to support long term maintenance of existing T-1s and to give users the possibility of customising the software to suit their specific T-1 application. This is the first version of the C-1 software and whilst it is not particularly tidy it works well and is very well commented which should be easy to understand for those familiar with MPASM. To use the code you will need to compile it using MPLAB (MPASM) which is available as a free download on the Microchip website. The resulting Hex file is loaded into the target processor using a PIC programmer of which there are numerous versions available as kits or ready built on the internet. Description At the heart of the program is a "sequencer" routine which controls up to 16 output lines. Pre-defined bit sequences are applied to the output lines to control the T-1 Tx/Rx circuitry in the right order or sequence, during Tx to Rx and Rx to Tx transitions. The sequences are hard coded into the defintions section of the program, descriptions of each control are given in the code. A sequencing delay is applied between each sequence code to allow the operation to be completed within the T-1. Normal operating controls, which also operate on many of the same controls that are driven by the sequencer, are factored into the output lines using software logic commands. Analogue interfaces are used to monitor the audio for hang AGC operation and determine the settings of the Hang AGC and Break In Delay controls. If you produce an improved version that you would like us to post here please contact us at support@cumbriadesigns.co.uk Ron Taylor G4GXO Cumbria Designs |
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| DFT Tone Detector for the 16F628A | |||||||
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The Discrete Fourier Transform (DFT) is a technique commonly used to detect the presence of a signal within a spectrum. The DFT operates by multiplying samples of the input spectrum with corresponding instantaneous sine and cosine values at the frequency to be detected. The results of each multiplication are summed as Real and Imaginary magnitudes ( I and Q) from which the magnitude of the polar form of the resultant vector can be computed. When a signal is present at or near the frequency of the DFT's sine and cosine "carriers" the summed I and Q counts will be high, where there is no signal the random effects of noise and any present non synchronous signals will result in a low count. By setting a threshold level against which to compare the I and Q results signal detection is possible. The process "looks" similar to the signal flow in a direct conversion phasing receiver. Are you saying that the 16F628A is a DSP? The 16F series of PICs are certainly not DSPs! Whilst many 16F PICS have A to Ds they are not fast enough nor is there sufficient processing time available to perform DFT calculations on analogue signals at audio frequencies. Hence we need to make a compromise, and in this instance a rather surprising one. Instead of sampling and operating on the amplitudes of analogue signals, this approach uses square waves. The input signal is squared using one of the 16F628's comparators, the internal sine and cosine references are replaced with quadrature square wave signals. In this implementation the detection frequency is set at 800Hz and the input signal is sampled at 16 times this frequency. The rest of the processing follows the DFT process with the multiplication be performed by XOR functions and the summing processes by counters. Key Variables Apart from setting the detection frequency there are two key variables that affect the tone detection characteristics. The first is the Block Size. This is the number of results that are summed in the I and Q counters. the greater the number the longer the detection time, the narrower the detection bandwidth and the greater the immunity against noise and unwanted signal detection. Fewer results produce a wider detection bandwidth and increase susceptibility to noise and close in unwanted signals. The second key variable is Detection Threshold. This is closely related to Block Size and behaves in a similar way. Increasing the threshold reduces noise detection and narrows the detection bandwidth BUT requires a better signal to noise ratio for wanted signal detection - which can be realised through increased Block Size. Reducing the threshold level reduces noise immunity and widens the detection bandwidth. Some experimentation with these variables may be required for your specific application. Implementation The audio input is applied to pin RA0 via a decoupling capacitor (100nF is fine). The reference voltage is applied to RA3 and is set at half rail by a 10K-10K divider between Vcc and Vss. A third 10K resistor is connected between RA0 and RA3 to hold RA0 at half rail potential to prevent it from floating. The detector output is an LED connected to ground via a 470R from RB0. The audio input level need only be a few tens of mV from a suitable source. 16F628A Tone Decoder.asm Note some of the formatting (e.g. waveform diagrams) may not look right in a standard file viewer. View and compile under MPLAB. This version corrects a flag error spotted by Francis Dupont and offers a significant improvement in performance. 16F628A Tone Decoder.hex hex file with settings as per above source code. Ron Taylor G4GXO Cumbria Designs |
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| RAMU the Remote Aerial Matching Unit | |||||||
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RAMU was conceived by Ian Keyser G3ROO as a system for matching aerials to their transmission lines at their feed points. The design appears in issue number 132 of the GQRP club's magazine SPRAT. RAMU comprises of two parts, a control unit and a remote "head unit" at the aerial. The control unit provides the operator with two rotary encoders, an LCD display to show settings and switches to control ancillary functions. The RAMU controls are scanned by a 16F877A processor and any changes are interpreted to produce a serial data word that is transmitted over cable to the remote head unit. The head unit decodes the received serial data to drive sets of relay banks which provide incremental changes in L and C. The rotary encoders emulate the controls on a conventional aerial matching unit in that by turning them they change the settings of the corresponding L and C banks at the remote head unit. The resultant L and C values are displayed on the control unit's LCD. Operation This implementation of RAMU provides three logical channels within the single serial data stream, one for L, one for C and a control channel for operating ancillary relays etc. Both of the L and C channels support a range of 1000 steps and share a programmable "tuning law" to greatly speed up the tuning process. The law operates by varying the step size, increasing it at high values, reducing it at low values. The tuning law and other functions are configured in "set up mode", the settings are saved to the 16F877A's internal EEPROM and recalled whenever RAMU is switched on. The design is highly flexible allowing several head units to be controlled from a single controller, alternatively multiple L and C configurations could also be controlled at a single head unit. There is considerable scope for further development to include band memories, (perhaps automatically selected from frequency measurement) and full automatic operation in conjunction with a VSWR sensor at the control unit. This hardware version employs a simple serial data interface at TTL levels and has been operated successfully over 150 feet (about 45m) of low cost LAN cable. The maximum potential range of this interface has not been determined but if necessary line drivers and a lower data rate could be employed to allow operation over considerable distances. Future Development Further development is encouraged. Should you produce any enhancements we will be pleased to post them here. Contact us at support@cumbriadesigns.co.uk Ron Taylor G4GXO and Ian Keyser G3ROO |
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